A 1.2-V 6-GHz Dual-Path Charge-Pump PLL Frequency Synthesizer for Quantum Control and Readout in CMOS 65-nm Process
Design implementation and comparison of various cmos charge pumps
Charge Pump Circuit - Getting Higher Voltage from Low Voltage Source
LOW VOLTAGE CHARGE PUMP CIRCUIT USING 0.18 µm CMOS TECHNOLOGY
Pelliconi cascade charge pump architecture | Download Scientific Diagram
A Review of Charge Pump Topologies for the Power Management of IoT Nodes
New design of charge pump circuit | Download Scientific Diagram
Is There a Charge Pump IC in Your Product's Future?
Charge Pumps Shine in Portable Designs | Analog Devices
0.18-V Input Charge Pump with Forward Body Biasing in Startup ...
Charge pump - YouTube
Figure 1 from A CMOS Low Voltage Charge Pump | Semantic Scholar
LM2776 CMOS Charge-Pump Voltage Converter - TI | Mouser
OAK 국가리포지터리 - OA 학술지 - Transactions on Electrical and Electronic Materials - High Performance CMOS Charge Pumps for Phase-locked Loop
CMOS Charge Pump Circuit - diagram, schematic, and image 02
Design to suppress return-back leakage current of charge pump circuit in low-voltage CMOS process - ScienceDirect
Negative high voltage DC-DC converter using a New Cross-coupled Structure
Electronics | Free Full-Text | A Review of Charge Pump Topologies for the Power Management of IoT Nodes
A New Low-Power Charge Pump with a Glitch-Free PFD for Speedup the Acquisition Process of a PLL in 65 nm CMOS Technology | SpringerLink
